Along with the differential signal level getting lower, noise immunity and transmission rate are getting higher, it is required that the transmission capacity should be getting higher. Traditionally, the TDM centralized switching structure is shown in FIG. 1, where every service board shares the TDM bus 12, and the center switch network board distributes clock, for data transmission at backplane circuit, to each service board with a point-to-point mode or a bus mode.
Suppose that clock high-level duration is t, data is transmitted at leading edge of the clock and is sampled at falling edge of the clock, then the time sequence difference of the traditional synchronous data transmission based on backplane is shown in FIG. 2, where phase between the frame synchronization signal and the clock is not aligned. As shown in FIG. 2 the frame synchronization signal between the center switch network board and the service boards has to time delay and so does the clock between the center switch network board and the service boards, transmission time for data from the center switch network board to the service boards is t2=t+t0 and transmission time for data from the service boards to the center switch network board is only t1=t−t0. Obviously, the transmission time is asymmetric, and when the transmission frequency is very high, the system reliability is greatly reduced, which means that the system capacity cannot be further increased. Therefore, clock synchronization is a bottleneck of traditional data transmission based on backplane bus with strict synchronization.
Since the distance and distributed parameters between different slots of the backplane are different, the time delay for different slots is different. There are disadvantages for the bus mode of signal transmission: a large area, a long distance, many slots, density pins, serious switching noise and electromagnetic interference (EMI) etc., when they are not dealt with adequately, there will be serious signal reflection and interference that cause signal distortion. In this case, the transmission rate is limited for the system reliability.
In order to increase transmission capacity of backplane circuit, increasing number of transmission signals is a fundamental method, but this is implemented at a cost of a complex system structure, reliability and performance, and the number of transmission signals is limited.
In summary, the disadvantages of traditional TDM bus data transmission based on backplane is as following:
1) it requires strict synchronization, i.e. phase between the frame signal and clock signal should be aligned more strictly;
2) There are disadvantages for the bus mode of signal transmission: a large area, a long distance, many slots, density pins, serious switching noise and electromagnetic interference (EMI) etc. Strict synchronization is very difficult. The transmission rate is greatly limited in order to guarantee system reliability;
3) no matter whether the clock signal is distributed with point-to-point mode or bus mode, since the distance and distributed parameters between different slots are different, the time delay is different;
4) In order to increase transmission capacity of backplane circuit, increasing number of transmission signals is a fundamental method, but this is implemented at a cost of a complex system structure, reliability and performance, and the number of transmission signals is limited.